This course is on digital logic, including theory, design, and implementation of combinational and sequential logic. This knowledge is reinforced by laboratory experience in the construction of digital logic circuits.
Title IX of the Education Amendments of 1972 prohibits sex discrimination against any participant in an educational program or activity that receives federal funds. The act is intended to eliminate sex discrimination in education. Title IX covers discrimination in programs, admissions, activities, and student-to-student sexual harassment. BYU's policy against sexual harassment extends not only to employees of the university but to students as well. If you encounter unlawful sexual harassment or gender based discrimination, please talk to your professor; contact the Equal Employment Office at 422-5895 or 367-5689 (24 hours); or contact the Honor Code Office at 422-2847.
Brigham Young University is committed to providing a working and learning atmosphere which reasonably accommodates qualified persons with disabilities. If you have any disability which may impair your ability to complete this course successfully, please contact the Services for Students with Disabilities Office at 422-2767. Reasonable academic accommodations are reviewed for all students who have qualified documented disabilities. Services are coordinated with the student with the instructor by the SSD Office. If you need assistance or if you feel you have been unlawfully discriminated against on the basis of disability, you may seek resolution through established grievance policy and procedures. You should contact the Equal Employment Office at 422-5895, D-282 ASB.
Dr. Brent E. Nelson, "Designing Digital Systems". ISBN: 0-7003-9246-7.
Homework will be assigned every few days. Homework is due by 5:00 PM on the due date indicated on the class schedule and should be turned in at the homework dropbox (click for map). Be sure to write your name and the assignment number on the homework.
Homework assignments must be very neat and easy to read. Messy homework may be penalized by the graders if it does not meet their expectations. All homework submissions should conform to the ECEn Department Homework Standards. You are required to use engineering paper for all homework assignments, with the exception of HDL code, which may be typed.
Late homework will be accepted up to one week late, but will receive 80% credit for one academic day late, 60% credit for two academic days late, and 40% credit for up to five academic days. Assignments more than five school days late will not receive any credit. If you have extenuating circumstances, please contact the professor on or before the assignment due date to make special arrangements.
Homework solutions will be posted on Blackboard a few days after the due date.
There will be three mid-term exams and one final exam. The exam dates will be shown on the class schedule.
Exams will be given at the testing center. Pay attention to the schedule and what your instructor tells you regarding when exams are given.
Short quizzes may be given at the beginning of class. These quizzes are intended to make sure you are doing the reading and keeping pace with the course. If you do the assigned reading and pay attention in class you should do well on the quizzes.
The labs are a major emphasis in this course. Labs will be graded based on functionality(pass off) and the lab report, 50% credit being given to each. Labs will be submitted electronically by updating your own personal lab submission web page. The exact mechanism will be explained in detail during the first lab class.
Many of the labs will involve construction and testing of digital circuits. When you have designed the circuit, you will pass it off to a lab TA, who will verify and record that it works. It is critical that each circuit work correctly according to the specifications given. You will not receive functionality credit on a circuit that does not work.
During the lab, you will gather an archive of information related to the lab experience. It is your responsibility to clearly organize and document the contents of your lab experience. Documentation of the design requires that you include everything related to your preparation, implementation and testing. This includes but is not limited to truth tables, state graphs, Karnaugh maps, schematics, DO files, UCF files, waveforms, oscilloscope screen captures, etc. Your lab documentation should include:
Table of Contents. A listing of all files in your project with a few-sentence description of each. The hierarchy of this table of contents should match the hierarchy of your project.
Assumptions. A bulleted list of any assumptions you made in the design and completion of your project.
Anomalies. A description of any anomalies encountered in the lab. These could be bugs in the CAD tools, VHDL problems, hardware problems and bugs you found in your design.
Files. All of the files created during the lab. This includes but is not limited to logic equations, truth tables, K-maps, circuit diagrams, schematics, state diagrams, Verilog files, DO files, UCF files, simulation results and block diagrams or sketches of your design.
Al lab report documentation is expected to be neat and orderly. Disorderly or messy lab reports may be penalized by the graders if it does not meet their expectations.
The deadline is three academic days after your lab section (see table below).
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Being able to meet deadlines is an important skill and timeliness is important to keeping the class on schedule. Turn in your report by the time of the deadline to avoid late penalties.
Late labs will be accepted up to one week late. Whatever portion of the lab is late will receive 80% credit for one academic day late, 60% credit for two academic days late, and 40% credit for up to five academic days late. Assignments more than five school days late will not receive any credit. Thus, if you pass off the functionality in lab, but unwisely procrastinate turning in the lab report, you will loose 10% of the total lab grade per day late. If you have extenuating circumstances, please contact the professor on or before the assignment due date to make special arrangements.
The weightings for the final grades are as follows:
Midterm Exam 1: 10%
Midterm Exam 2: 10%
Midterm Exam 3: 10%
Final Exam: 25%
Homework: 15%
Labs: 25%
Quizzes: 5%
The final grades may be curved to be more lenient than the table below indicates, but will otherwise be based on the following scale:
A 93 A- 90 B+ 87 B 83 B- 80 C+ 77 C 93 C- 70 D+ 67 D 63 D- 60
For example, to get an A, you would need at least 93% overall, to get a A- you would need at least 90%, etc.
The digital learning lab is a state-of-the-art teaching environment for digital systems. Associated with this class, you are being charged an $11 lab fee. This goes for the maintenance, repair and replacement of the equipment in the lab.
There is a printer is the lab. The cost of using this printer is $.03 per page. Charges will be automatically deducted from your signature card account.
The content of this course may change throughout the semester as seen fit by the instructors.
