P160 Prototype Module to FPGA Pin Mapping

The following tables describe which header pin numbers on the P160 prototype board are connected to which FPGA pin numbers. This information can be used in the UCF file to connect signals to the appropriate pin numbers on the FPGA.

Refer to the P160 Prototype Module manual for information on which pin on the P160 prototype header connects to which pin on the Memec V2MB1000 development board header.

 

P160 Prototype Module Header J3

FPGA Pin J3 Pin
(Vin) 1
(2.5 V) 3
AB18 5
AA16 7
L21 9
J22 11
H21 13
F22 15
E21 17
C22 19
L19 21
K20 23
J19 25
G20 27
E20 29
K17 31
J18 33
G18 35
E18 37
A10 39
J3 Pin FPGA Pin
2 (3.3V)
4 (GND)
6 -
8 L22
10 K21
12 H22
14 G21
16 E22
18 D21
20 L18
22 K18
24 J20
26 H19
28 E19
30 L17
32 J17
34 H18
36 F18
38 E11
40 B10

 

P160 Prototype Module Header J4

FPGA Pin J4 Pin
(Vin) 1
(2.5 V) 3
(TCK) 5
(TDO) 7
(TDI) 9
(TMS) 11
(FPGA.BITSTREAM) 13
(SM.DOUT/BUSY) 15
(FPGA.CCLK) 17
(DONE) 19
(INITn) 21
(PROGRAMn) 23
(GND) 25
(GND) 27
(GND) 29
(GND) 31
(GND) 33
(GND) 35
(GND) 37
(GND) 39
J4 Pin FPGA Pin
2 (3.3 V)
4 Y15
6 K22
8 J21
10 G22
12 F21
14 D22
16 C21
18 L20
20 K19
22 H20
24 G19
26 F20
28 F19
30 D11
32 C11
34 C8
36 D8
38 V6
40 AA5

 

P160 Prototype Module Header J5

FPGA Pin J3 Pin
(Vin) 1
(2.5 V) 3
- 5
JTAG_LOOPBACK 7
JTAG_LOOPBACK 9
- 11
- 13
- 15
- 17
- 19
- 21
- 23
(GND) 25
(GND) 27
(GND) 29
(GND) 31
(GND) 33
(GND) 35
(GND) 37
(GND) 39
J3 Pin FPGA Pin
2 (3.3 V)
4 W14
6 Y14
8 W13
10 Y13
12 V13
14 Y12
16 W12
18 V12
20 V10
22 Y10
24 W10
26 Y9
28 W9
30 Y8
32 W8
34 Y7
36 W7
38 Y6
40 W6

 

P160 Prototype Module Header J6

FPGA Pin J3 Pin
(Vin) 1
(2.5 v) 3
AB16 5
AA15 7
AB15 9
AA14 11
AB14 13
AA13 15
AB13 17
AA12 19
AB12 21
AB9 23
AA9 25
AB8 27
AA8 29
AB7 31
AA7 33
AB6 35
AA6 37
AB5 39
J3 Pin FPGA Pin
2 (3.3 V)
4 (GND)
6 *AA17
8 AB17
10 W17
12 Y17
14 W16
16 Y16
18 V16
20 W15
22 V14
24 U14
26 U13
28 U12
30 U11
32 U10
34 U9
36 V9
38 V8
40 V7

* Also connected to the user LED